Assigns each gate in a circuit an error allowance proportional to how critical it is to the overall computation — ensuring the error tolerance budget is invested where it produces the most benefit, not spread uniformly.
Every circuit has a total error budget — the maximum cumulative error probability the output can tolerate before the result becomes unreliable. Spreading that budget uniformly across all gates is wasteful: some gates are on the critical path of the computation and dominate the output's sensitivity to errors; others are peripheral and contribute little to final accuracy. Uniform allocation over-protects low-criticality gates while under-protecting high-criticality ones.
The error budget allocator uses N-nacci tier assignments to match each gate's error allowance to its criticality in the circuit. Gates on the critical path receive tighter error budgets, triggering more aggressive error correction; peripheral gates receive looser budgets, reducing overhead where it is not needed. A Monte Carlo validation step confirms that the allocation achieves the target total error probability, with documented confidence intervals.
Each gate receives an error allowance proportional to its contribution to output sensitivity, concentrating correction effort on the gates that matter most. Critical-path gates get tighter budgets; peripheral gates receive proportionally more slack.
The criticality tiers are assigned according to N-nacci proportions, giving a framework-derived hierarchy rather than an empirically tuned one. This produces consistent, predictable allocation behavior across circuits of different sizes and topologies.
Simulated error injection validates that the allocation achieves the target total error probability, providing documented confidence intervals before any hardware commitment. The validation runs ahead of scheduling, not during execution.
The allocation is normalized so that the sum of all gate error allowances exactly equals the total error budget, with no unaccounted slack or overrun. Every tolerance point is assigned; none is lost to rounding or left as untracked reserve.
Planning layer — run before compiling or scheduling a circuit on hardware. The output feeds into the fault-tolerant executor (which applies correction at the appropriate intensity per gate) and the resource estimator (which uses the allocation to forecast how much physical qubit overhead is needed). The unified budget pipeline combines this with resource estimation in a single workflow.
Uses the error allocation to forecast hardware requirements, translating per-gate budgets into physical qubit and ancilla counts.
Combines error allocation and resource estimation in one end-to-end pass, eliminating the need to run and coordinate them separately.
Published under the GNU AGPLv3 with whitepaper and reference implementation. Commercial licensing is available for closed-source deployments.